Staff Engineer – Analog Design (High‑Speed SerDes)

About the role

Synopsys is seeking a skilled analog design engineer to develop medium‑complexity analog circuits for high‑speed SerDes products. You will work on Ethernet and PCIe standards, collaborating with a global, multicultural R&D team to deliver silicon‑proven IP.

Key responsibilities

• Design and develop analog circuits (ADC, DAC, PLL, transceiver blocks) for high‑speed SerDes IP.
• Define and plan design activities, set milestones, and track deliverables.
• Prepare and lead technical design reviews, capture actions, and enforce best practices.
• Analyze layout parasitics, work closely with layout teams, and optimise performance, power and area.
• Correlate silicon results with simulations, investigate discrepancies and refine designs.
• Collaborate with cross‑functional teams across multiple locations.

Required profile

• Proven experience in CMOS analog circuit design of medium complexity.
• Hands‑on knowledge of ADCs, DACs, PLLs and transceiver blocks.
• Ability to evaluate layout parasitic effects and optimise for performance, power and area.
• Comfort conducting technical reviews and ensuring silicon‑simulation correlation.
• Strong communication skills for global, multicultural teamwork.
• Proactive problem‑solver, willing to mentor junior engineers.

Required skills

• CMOS technology expertise
• Analog circuit design (ADC, DAC, PLL, transceiver)
• High‑speed SerDes design (Ethernet, PCIe)
• Layout parasitic analysis
• Silicon‑simulation correlation
• Technical design review

What we offer

• Opportunity to work on industry‑leading SerDes IP used in mobile, automotive, cloud, AI, 5G and storage markets.
• Collaborative environment with global experts.
• Access to cutting‑edge design tools and technologies.